The present invention relates to a method of producing a semiconductor device such as a metal insulator semiconductor field effect transistor (MISFET), and more specifically relates to a method of doping with impurity to form in the semiconductor device various barrier regions such as a field dope layer disposed under a field oxide layer for electrical isolation of an individual device, a channel stopper region disposed under a channel region of a (MISFET) for effectively preventing punch-through or short channel effect in the channel region, and a well region formed in a semiconductor substrate to define a confined and protected device region.
Conventionally, the above noted various barrier regions have been formed by a variety of doping methods in a semiconductor device in the form of a field dope layer, a channel stopper region or a well region so as to protect the semiconductor device.
With regard to field dope layers, this layer is disposed below a field oxide layer. Conventionally, an isolation region is formed by LOCOS technology so as to separate devices formed on a semiconductor integrated circuit. This technology is carried out by forming a field oxide layer composed of a thermally oxidized film along a device isolation region. The field dope layer is interposed under the field oxide layer, in the form of a densely doped impurity layer. This field dope layer is effective to avoid inversion of a semiconductor layer under the field oxide so as to raise the threshold voltage, thereby ensuring electrical isolation of devices from the substrate and electrical separation of adjacent devices. Conventionally, the field dope layer is formed by ion implantation of impurity into the substrate surface, and the field oxide layer is formed by subsequently thermally oxidizing the substrate surface.
However, when using ion implantation, impurity would be introduced through a mask made of silicon nitride and silicon dioxide into a device region surrounded by the device isolation region, thereby causing drawbacks in that the operating characteristics of the device are impaired.
With regard to the channel stopper region, this region is formed in an insulating gate field effect transistor device. The transistor device is composed of a source region and a drain region formed in spaced relation to each other on a surface of a semiconductor substrate, a channel region formed between the source and drain regions, and a gate electrode formed on the channel region and separated from the channel region by a gate insulating film.
With the development of integrated circuit technology, transistor elements become increasingly miniaturized, and the length of the channel region is made shorter and shorter. For this reason, depletion layers positioned at opposite ends of the channel region tend to come close to each other, thereby causing drawbacks such as short channel effect and punch-through. The channel stopper region is provided to prevent the short channel effect and punch-through. The channel stopper region is composed of a heavily doped impurity layer disposed under the channel region so as to avoid expansion of the depletion layers along the channel direction.
However, since the channel stopper region is formed of a highly doped impurity layer disposed under the channel region, its processing is quite difficult and complicated. Therefore, the effective channel stopper region cannot be formed by the conventional ion implantation technology and predeposition diffusion technology. Further, the known channel stopper region is composed of a high density impurity layer containing N type impurity such as arsenic, but there has not been provided a channel stopper region composed of P type high density impurity layer.
With regard to a well region, this is formed in a specific type of the semiconductor device composed of a silicon semiconductor film deposited on a semiconductor substrate by epitaxial growth. Device regions are provided in the silicon semiconductor film. This structure can facilitate integration of semiconductor devices, since device regions are fabricated on the film at a high integration density. Further, the device has high speed operation, since the device is formed in a semiconductor film, or region, having a relatively low impurity concentration with relatively small junction capacitance. When producing such type of semiconductor device, a well region is firstly formed in a surface of the substrate to provide a confined device region isolated from the semiconductor substrate, and a first field oxide film is then formed around the well region.
Next, a silicon semiconductor film is deposited over the first field oxide film. This silicon semiconductor film is partly thermally oxidized to form a second field oxide film, and the remaining part thereof defines the device region just above the previously formed well region.
However, in the above noted prior art, since the well region is provisionally formed in the semiconductor substrate surface prior to the formation of the first field oxide film, drawbacks are presented in that additional steps are needed and the processing is complicated, so that productivity of the device is low. Further, the well region shares a relatively large area dimension in order to achieve good device isolation.